Integrated glass-core advanced-packaging substrate stack

The integrated glass-core advanced-packaging substrate stack is the architectural linchpin of the glass-core advanced-packaging substrates portfolio. A single ordered article — glass core, aluminum nitride thermal liner, aluminum borate adhesion liner, tungsten boride barrier with an optional tungsten-boron-nitride composition gradient, copper conductor, cap layer, redistribution dielectric, and high-k passive — is claimed and qualified together as a cooperating system against sixteen package reliability endpoints. No prior art and no competitor today covers this specific ordered, co-qualified combination in a single article. The commercial imperative is timing. The semiconductor industry is actively committing capital to glass-core substrate roadmaps, displacing organic cores for high-bandwidth memory and AI accelerator packages. A buyer who controls the parent system claim over the integrated glass-core stack enters that adoption window holding an enforceability advantage that individual layer claims cannot replicate: the claim reads on the whole shipped package, every load-bearing layer is verifiable by designated teardown metrology, and the cooperating-layer design is the configuration competitors must replicate to meet the same reliability profile. That is not a feature patent — it is an architecture patent over the product itself.

Each candidate is validated by multiple independent machine-learning interatomic potentials. A material advances only when the engines agree on phonon (dynamic) stability — disagreement is surfaced, not hidden.

This asset is not a single compound but a multilayer package architecture, and its technical contribution is the ordered cooperation of the constituent layers. Working outward from the glass core: an aluminum nitride liner manages thermal load and provides an adhesion foundation; an aluminum borate liner handles diffusion-blocking and adhesion at the next interface; a tungsten boride barrier — with an optional graded tungsten-boron-nitride transition zone — suppresses copper diffusion into the liner stack while maintaining the electrical and thermal conductivity the package demands; copper carries signal and power; cap and redistribution layers complete the wiring; and a high-k passive layer provides integrated decoupling. The key design insight is that none of these layers individually satisfies the full set of sixteen reliability endpoints (covering copper diffusion, thermal performance, mechanical integrity, and dielectric qualification). The stack clears those endpoints jointly, by design. The importance of layer order is demonstrated concretely by the comparative result showing that bare crystalline tungsten boride in direct contact with aluminum borate fails — the cooperating-layer arrangement is precisely what survives where a naive combination does not. This distinction is not incidental to the patent claim; it is load-bearing. The negative limitation excluding that bare-contact configuration simultaneously distinguishes prior art and disclaims an embodiment that the experimental record shows is nonviable. Two independent machine-learning interatomic potentials — MACE and CHGNet — have been applied at the system level, and both return a stability verdict of stable across the engines. While a multilayer package architecture does not have phonon dispersion curves in the same sense as a crystalline unit cell, this multi-engine agreement means both potentials converge on the same structural and energetic characterization of the ordered stack rather than flagging instability in any modeled configuration. Each constituent layer within the portfolio carries its own independent computational validation. At the system level, the simulation of record is an integrated split-lot proof vehicle, a prophetic example designed to demonstrate co-qualification of the full ordered stack against all sixteen package reliability endpoints, with teardown metrology as the verification method.

The addressable market is the advanced semiconductor packaging substrate space, estimated at more than ten billion dollars across high-bandwidth memory, AI accelerator packages, 2.5D interposers, and chiplet bridges. These are premium packages where substrate cost is a small fraction of system value but substrate performance — copper diffusion resistance, thermal management, mechanical reliability over thousands of thermal cycles — gates whether the package ships at all. The customers making qualification decisions are OSATs, foundry packaging operations, and HBM manufacturers, all of whom face the same inflection: glass-core substrates are entering high-volume roadmaps and the supplier ecosystem has not yet locked in its material and process choices. The serviceable slice of that market is the portion of substrate value attributable to the integrated stack architecture itself. Because the parent claim reads on the whole ordered article rather than a single film, monetization logic is platform-level: a per-package royalty or foundational license rate can be justified at a higher tier than any single-layer claim would support. Value scales with finished-package volume, not individual film deposition cost, which is the correct royalty base for a packaging-architecture patent. All market figures here are estimates absent committed volume or pricing data; the ten-billion-dollar total addressable market figure reflects published industry analyst estimates for the advanced substrate segment through the glass-core adoption window. Licensing structure choices include an exclusive foundational platform license to one integrator (maximum per-unit rate, premium for exclusivity during the adoption window), a non-exclusive multi-party structure across OSATs and HBM makers with field-of-use carve-outs (for example, HBM versus logic interposers versus chiplet bridges), or outright acquisition by a party that intends to own the architecture across all fields of use. The adoption window is the relevant time constraint: as the industry standardizes on glass-core process flows, the architectural claim is most valuable before those flows freeze.

only integrated solution addressing the full glass-core reliability profile in one ordered stack

claimed by ordered configuration + cooperating-layer limitations

The natural acquirers and licensees are OSATs, foundry packaging operations, and HBM manufacturers — the integrators who will actually build and ship glass-core packages at volume. Among these, large foundry packaging operations and OSATs with glass-core programs in active development have the strongest acquisition rationale: the parent claim reads on the whole package they ship, so sole ownership is strategically decisive in a way that a layer-level asset is not. HBM manufacturers are strong candidates for an exclusive field-of-use license covering memory package applications, with the remainder of the claim scope available for separate licensing to logic interposer and chiplet bridge integrators. This field-of-use structure allows multiple high-value licensees without diluting the core position. A strategic acquirer seeking to control the glass-core architecture across all applications — a substrate supplier, an advanced packaging foundry, or a large integrated device manufacturer building a captive packaging capability — would justify a premium for full exclusivity. The adoption window is the relevant urgency: the value of controlling the architectural patent over the integrated glass-core stack is highest while the industry is still making process and supplier decisions, and declines as those decisions lock in around alternatives.

The principal risk is integration. Each constituent layer has been independently validated, and the two ML potentials agree on system-level stability, but the cooperating stack has not yet been built and co-qualified against all sixteen package reliability endpoints in a single test vehicle. The comparative failure of the bare-contact configuration shows that the relationship between layers is consequential — the correct ordered arrangement is required, not assumed. Until the integrated test vehicle is built and torn down, the claim's enforceability depends on extrapolating from layer-level evidence, and the certainty score reflects that gap. Execution risk in the test vehicle itself is the next-order concern: the split-lot proof vehicle must demonstrate that teardown metrology (the sixteenth endpoint) can independently verify each load-bearing layer in the as-built article, not merely that the layers survive individually. If teardown observability cannot be demonstrated in the integrated build, the enforceability argument weakens materially. Both risks are addressed by the same action: building the integrated test vehicle. That program converts the remaining uncertainty into data and either confirms the platform's full claimed scope or identifies which cooperating-layer parameters require adjustment before the system claim can be asserted with maximum confidence.